The invention relates generally to the manufacture and performance of semiconductor devices, particularly to managing semiconductor manufacturing defects in a manufacturing line.
Computing systems and the integrated circuits (ICs) therein are typically designed for a specific total operating time or number of power on hours (POH) over their useful life, which can be referred to as the design life. This design life can estimate the lifespan or reliability of an IC, where the elapse of a particular number of POH can act as a flag for replacing the product. The aging of a manufactured component over time can be predicted mathematically in a “reliability model” of the manufacturing line which produced the component.
Current manufacturing reliability models use expected values of temperature and/or voltage, such as a specification, design, and/or nominal operating temperature or voltage of a system, device, and/or IC chip, at the time of design to predict a total operating time of the system. However, actual operating conditions (e.g., temperatures and voltages) can vary significantly, altering the actual time remaining until failure of the system and/or the system's components. In addition, some products may use voltages that are different from their intended voltage during operation. IC products may have a true design life that differs significantly from what the reliability model of their manufacturing line predicts.